 |
Vc
1.4.2
SIMD Vector Classes for C++
|
|
31 #include "common/macros.h"
32 namespace Vc_VERSIONED_NAMESPACE
52 typedef unsigned char uchar;
53 typedef unsigned short ushort;
54 typedef unsigned int uint;
58 OriginalOemProcessor = 0,
59 IntelOverDriveProcessor = 1,
73 static inline ushort
cacheLineSize() {
return static_cast<ushort
>(s_cacheLineSize) * 8u; }
83 static inline bool isAmd () {
return s_ecx0 == 0x444D4163; }
85 static inline bool isIntel () {
return s_ecx0 == 0x6C65746E; }
87 static inline bool hasSse3 () {
return s_processorFeaturesC & (1 << 0); }
89 static inline bool hasPclmulqdq() {
return (s_processorFeaturesC & (1 << 1)) != 0; }
91 static inline bool hasMonitor() {
return (s_processorFeaturesC & (1 << 3)) != 0; }
93 static inline bool hasVmx () {
return (s_processorFeaturesC & (1 << 5)) != 0; }
95 static inline bool hasSmx () {
return (s_processorFeaturesC & (1 << 6)) != 0; }
97 static inline bool hasEist () {
return (s_processorFeaturesC & (1 << 7)) != 0; }
99 static inline bool hasTm2 () {
return (s_processorFeaturesC & (1 << 8)) != 0; }
101 static inline bool hasSsse3() {
return (s_processorFeaturesC & (1 << 9)) != 0; }
103 static inline bool hasFma () {
return (s_processorFeaturesC & (1 << 12)) != 0; }
105 static inline bool hasCmpXchg16b() {
return (s_processorFeaturesC & (1 << 13)) != 0; }
107 static inline bool hasPdcm () {
return (s_processorFeaturesC & (1 << 15)) != 0; }
109 static inline bool hasDca() {
return (s_processorFeaturesC & (1 << 18)) != 0; }
111 static inline bool hasSse41() {
return (s_processorFeaturesC & (1 << 19)) != 0; }
113 static inline bool hasSse42() {
return (s_processorFeaturesC & (1 << 20)) != 0; }
115 static inline bool hasMovbe() {
return (s_processorFeaturesC & (1 << 22)) != 0; }
117 static inline bool hasPopcnt(){
return (s_processorFeaturesC & (1 << 23)) != 0; }
120 static inline bool hasAes () {
return (s_processorFeaturesC & (1 << 25)) != 0; }
123 static inline bool hasOsxsave() {
return (s_processorFeaturesC & (1 << 27)) != 0; }
125 static inline bool hasAvx () {
return (s_processorFeaturesC & (1 << 28)) != 0; }
127 static inline bool hasBmi1 () {
return (s_processorFeatures7B& (1 << 3)) != 0; }
129 static inline bool hasHle () {
return (s_processorFeatures7B& (1 << 4)) != 0; }
131 static inline bool hasAvx2 () {
return (s_processorFeatures7B& (1 << 5)) != 0; }
133 static inline bool hasBmi2 () {
return (s_processorFeatures7B& (1 << 8)) != 0; }
135 static inline bool hasRtm () {
return (s_processorFeatures7B& (1 << 11)) != 0; }
138 static inline bool hasAvx512f () {
return (s_processorFeatures7B & (1u << 16)) != 0; }
140 static inline bool hasAvx512dq () {
return (s_processorFeatures7B & (1u << 17)) != 0; }
142 static inline bool hasAvx512ifma() {
return (s_processorFeatures7B & (1u << 21)) != 0; }
144 static inline bool hasAvx512pf () {
return (s_processorFeatures7B & (1u << 26)) != 0; }
146 static inline bool hasAvx512er () {
return (s_processorFeatures7B & (1u << 27)) != 0; }
148 static inline bool hasAvx512cd () {
return (s_processorFeatures7B & (1u << 28)) != 0; }
150 static inline bool hasAvx512bw () {
return (s_processorFeatures7B & (1u << 30)) != 0; }
152 static inline bool hasAvx512vl () {
return (s_processorFeatures7B & (1u << 31)) != 0; }
154 static inline bool hasAvx512vbmi() {
return (s_processorFeatures7C & (1u << 1)) != 0; }
157 static inline bool hasF16c () {
return (s_processorFeaturesC & (1 << 29)) != 0; }
159 static inline bool hasRdrand(){
return (s_processorFeaturesC & (1 << 30)) != 0; }
161 static inline bool hasFpu () {
return (s_processorFeaturesD & (1 << 0)) != 0; }
162 static inline bool hasVme () {
return (s_processorFeaturesD & (1 << 1)) != 0; }
164 static inline bool hasDe () {
return (s_processorFeaturesD & (1 << 2)) != 0; }
166 static inline bool hasPse () {
return (s_processorFeaturesD & (1 << 3)) != 0; }
168 static inline bool hasTsc () {
return (s_processorFeaturesD & (1 << 4)) != 0; }
170 static inline bool hasMsr () {
return (s_processorFeaturesD & (1 << 5)) != 0; }
172 static inline bool hasPae () {
return (s_processorFeaturesD & (1 << 6)) != 0; }
174 static inline bool hasCx8 () {
return (s_processorFeaturesD & (1 << 8)) != 0; }
176 static inline bool hasMtrr () {
return (s_processorFeaturesD & (1 << 12)) != 0; }
178 static inline bool hasCmov () {
return (s_processorFeaturesD & (1 << 15)) != 0; }
180 static inline bool hasClfsh() {
return (s_processorFeaturesD & (1 << 19)) != 0; }
182 static inline bool hasAcpi () {
return (s_processorFeaturesD & (1 << 22)) != 0; }
184 static inline bool hasMmx () {
return (s_processorFeaturesD & (1 << 23)) != 0; }
186 static inline bool hasSse () {
return (s_processorFeaturesD & (1 << 25)) != 0; }
188 static inline bool hasSse2 () {
return (s_processorFeaturesD & (1 << 26)) != 0; }
189 static inline bool hasHtt () {
return (s_processorFeaturesD & (1 << 28)) != 0; }
191 static inline bool hasSse4a() {
return (s_processorFeatures8C & (1 << 6)) != 0; }
193 static inline bool hasMisAlignSse() {
return (s_processorFeatures8C & (1 << 7)) != 0; }
195 static inline bool hasAmdPrefetch() {
return (s_processorFeatures8C & (1 << 8)) != 0; }
197 static inline bool hasXop () {
return (s_processorFeatures8C & (1 << 11)) != 0; }
199 static inline bool hasFma4 () {
return (s_processorFeatures8C & (1 << 16)) != 0; }
201 static inline bool hasRdtscp() {
return (s_processorFeatures8D & (1 << 27)) != 0; }
202 static inline bool has3DNow() {
return (s_processorFeatures8D & (1u << 31)) != 0; }
203 static inline bool has3DNowExt() {
return (s_processorFeatures8D & (1 << 30)) != 0; }
207 static inline uint
L1Data() {
return s_L1Data; }
209 static inline uint
L2Data() {
return s_L2Data; }
211 static inline uint
L3Data() {
return s_L3Data; }
212 static inline ushort L1InstructionLineSize() {
return s_L1InstructionLineSize; }
213 static inline ushort L1DataLineSize() {
return s_L1DataLineSize; }
214 static inline ushort L2DataLineSize() {
return s_L2DataLineSize; }
215 static inline ushort L3DataLineSize() {
return s_L3DataLineSize; }
216 static inline uint L1Associativity() {
return s_L1Associativity; }
217 static inline uint L2Associativity() {
return s_L2Associativity; }
218 static inline uint L3Associativity() {
return s_L3Associativity; }
219 static inline ushort prefetch() {
return s_prefetch; }
222 static void interpret(
uchar byte,
bool *checkLeaf4);
225 static uint s_logicalProcessors;
226 static uint s_processorFeaturesC;
227 static uint s_processorFeaturesD;
228 static uint s_processorFeatures7B;
229 static uint s_processorFeatures7C;
230 static uint s_processorFeatures8C;
231 static uint s_processorFeatures8D;
232 static uint s_L1Instruction;
233 static uint s_L1Data;
234 static uint s_L2Data;
235 static uint s_L3Data;
236 static ushort s_L1InstructionLineSize;
237 static ushort s_L1DataLineSize;
238 static ushort s_L2DataLineSize;
239 static ushort s_L3DataLineSize;
240 static uint s_L1Associativity;
241 static uint s_L2Associativity;
242 static uint s_L3Associativity;
244 static uchar s_brandIndex;
245 static uchar s_cacheLineSize;
246 static uchar s_processorModel;
247 static uchar s_processorFamily;
248 static ProcessorType s_processorType;
249 static bool s_noL2orL3;
252 #ifndef Vc_COMPILE_LIB
255 template <
int = 0>
struct RunCpuIdInit {
256 RunCpuIdInit() { CpuId::init(); }
257 static RunCpuIdInit tmp;
259 template <
int N> RunCpuIdInit<N> RunCpuIdInit<N>::tmp;
262 static auto ctor = RunCpuIdInit<>::tmp;
269 #endif // VC_CPUID_H_
static bool hasAvx512dq()
Return whether the CPU supports AVX512dq.
static bool hasAvx512vbmi()
Return whether the CPU supports AVX512vbmi.
static bool hasEist()
Return whether the CPU supports the Enhanced Intel SpeedStep technology.
unsigned short ushort
unsigned short shorthand
static bool hasAvx2()
Return whether the CPU supports AVX2.
static bool hasVmx()
Return whether the CPU supports the Virtual Machine Extensions.
static bool hasSse4a()
Return whether the CPU supports SSE4a.
static uint L2Data()
Return the size of the L2 cache.
static uint processorModel()
Return the model number of the processor (vendor dependent).
static bool hasF16c()
Return whether the CPU supports 16-bit floating-point conversion instructions.
static uint logicalProcessors()
Return the number of logical processors.
static bool hasAvx512cd()
Return whether the CPU supports AVX512cd.
static bool hasPae()
Return whether the CPU supports the Physical Address Extension.
static bool hasPse()
Return whether the CPU contains Page Size Extensions.
static bool hasSse42()
Return whether the CPU supports SSE 4.2.
static bool hasAmdPrefetch()
Return whether the CPU supports the AMD prefetchw instruction.
static bool hasAvx512vl()
Return whether the CPU supports AVX512vl.
static bool isAmd()
Return whether the CPU vendor is AMD.
static bool hasBmi1()
Return whether the CPU supports BMI1.
static bool hasAvx512ifma()
Return whether the CPU supports AVX512ifma.
static bool hasMtrr()
Return whether the CPU supports Memory Type Range Registers.
static bool hasSse()
Return whether the CPU supports SSE.
static bool hasAcpi()
Return whether the CPU supports ACPI.
static bool hasAes()
Return whether the CPU supports the AESNI instructions.
static bool hasOsxsave()
Return whether the CPU and OS support the XSETBV/XGETBV instructions.
static bool hasPclmulqdq()
Return whether the CPU supports the PCLMULQDQ instruction.
unsigned int uint
unsigned int shorthand
static bool hasMonitor()
Return whether the CPU supports the MONITOR/MWAIT instructions.
static bool hasSse2()
Return whether the CPU supports SSE2.
static bool hasCx8()
Return whether the CPU supports the CMPXCHG8B instruction.
static bool hasRdrand()
Return whether the CPU supports the RDRAND instruction.
static bool hasCmov()
Return whether the CPU supports CMOV instructions.
static bool hasAvx()
Return whether the CPU supports AVX.
static bool hasAvx512f()
Return whether the CPU supports AVX512f.
static bool hasFpu()
Return whether the CPU contains an x87 FPU.
static bool hasMisAlignSse()
Return whether the CPU supports misaligned SSE instructions.
static bool hasSse3()
Return whether the CPU supports SSE3.
static bool hasPdcm()
Return whether the CPU supports the Perfmon and Debug Capability.
static bool hasAvx512er()
Return whether the CPU supports AVX512er.
static bool hasFma()
Return whether the CPU supports FMA extensions using YMM state.
static bool hasRdtscp()
Return whether the CPU supports the RDTSCP instruction.
static uint L3Data()
Return the size of the L3 cache.
static bool hasMmx()
Return whether the CPU supports MMX.
static uint L1Instruction()
Return the size of the L1 instruction cache.
static bool hasDca()
Return whether the CPU supports Direct Cache Access: prefetch data from a memory mapped device.
static bool hasClfsh()
Return whether the CPU supports the CLFLUSH instruction.
static bool hasCmpXchg16b()
Return whether the CPU supports CMPXCHG16B.
static bool hasDe()
Return whether the CPU contains Debugging Extensions.
static bool hasTm2()
Return whether the CPU supports Thermal Monitor 2.
static bool hasBmi2()
Return whether the CPU supports BMI2.
static ProcessorType processorType()
Return the ProcessorType.
static bool hasFma4()
Return whether the CPU supports the FMA4 instructions.
static bool hasSse41()
Return whether the CPU supports SSE 4.1.
static bool hasAvx512pf()
Return whether the CPU supports AVX512pf.
static uint processorFamily()
Return the family number of the processor (vendor dependent).
static uint L1Data()
Return the size of the L1 data cache.
static bool hasMovbe()
Return whether the CPU supports the MOVBE instruction.
static bool hasXop()
Return whether the CPU supports the XOP instructions.
static ushort cacheLineSize()
Return the cache line size in bits.
static bool hasSmx()
Return whether the CPU supports the Safer Mode Extensions.
static bool hasSsse3()
Return whether the CPU supports SSSE3.
static bool hasHle()
Return whether the CPU supports transactional synchronization extensions.
static bool isIntel()
Return whether the CPU vendor is Intel.
static bool hasTsc()
Return whether the CPU supports the RDTSC instruction.
static bool hasAvx512bw()
Return whether the CPU supports AVX512bw.
static bool hasPopcnt()
Return whether the CPU supports the POPCNT instruction.
static bool hasRtm()
Return whether the CPU supports transactional synchronization extensions.
unsigned char uchar
unsigned char shorthand
static bool hasMsr()
Return whether the CPU supports the Model Specific Registers instructions.
1.8.17