Vc  1.4.1
SIMD Vector Classes for C++
cpuid.h
1 /* This file is part of the Vc library. {{{
2 Copyright © 2009-2015 Matthias Kretz <kretz@kde.org>
3 
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5 modification, are permitted provided that the following conditions are met:
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24 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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26 }}}*/
27 
28 #ifndef VC_CPUID_H_
29 #define VC_CPUID_H_
30 
31 #include "common/macros.h"
32 namespace Vc_VERSIONED_NAMESPACE
33 {
34 
50 class CpuId
51 {
52  typedef unsigned char uchar;
53  typedef unsigned short ushort;
54  typedef unsigned int uint;
55 
56  public:
57  enum ProcessorType {
58  OriginalOemProcessor = 0,
59  IntelOverDriveProcessor = 1,
60  DualProcessor = 2,
61  IntelReserved = 3
62  };
63 
70  static void init();
71 
73  static inline ushort cacheLineSize() { return static_cast<ushort>(s_cacheLineSize) * 8u; }
75  static inline ProcessorType processorType() { return s_processorType; }
77  static inline uint processorFamily() { return s_processorFamily; }
79  static inline uint processorModel() { return s_processorModel; }
81  static inline uint logicalProcessors() { return s_logicalProcessors; }
83  static inline bool isAmd () { return s_ecx0 == 0x444D4163; }
85  static inline bool isIntel () { return s_ecx0 == 0x6C65746E; }
87  static inline bool hasSse3 () { return s_processorFeaturesC & (1 << 0); }
89  static inline bool hasPclmulqdq() { return (s_processorFeaturesC & (1 << 1)) != 0; }
91  static inline bool hasMonitor() { return (s_processorFeaturesC & (1 << 3)) != 0; }
93  static inline bool hasVmx () { return (s_processorFeaturesC & (1 << 5)) != 0; }
95  static inline bool hasSmx () { return (s_processorFeaturesC & (1 << 6)) != 0; }
97  static inline bool hasEist () { return (s_processorFeaturesC & (1 << 7)) != 0; }
99  static inline bool hasTm2 () { return (s_processorFeaturesC & (1 << 8)) != 0; }
101  static inline bool hasSsse3() { return (s_processorFeaturesC & (1 << 9)) != 0; }
103  static inline bool hasFma () { return (s_processorFeaturesC & (1 << 12)) != 0; }
105  static inline bool hasCmpXchg16b() { return (s_processorFeaturesC & (1 << 13)) != 0; }
107  static inline bool hasPdcm () { return (s_processorFeaturesC & (1 << 15)) != 0; }
109  static inline bool hasDca() { return (s_processorFeaturesC & (1 << 18)) != 0; }
111  static inline bool hasSse41() { return (s_processorFeaturesC & (1 << 19)) != 0; }
113  static inline bool hasSse42() { return (s_processorFeaturesC & (1 << 20)) != 0; }
115  static inline bool hasMovbe() { return (s_processorFeaturesC & (1 << 22)) != 0; }
117  static inline bool hasPopcnt(){ return (s_processorFeaturesC & (1 << 23)) != 0; }
118  //static inline bool hasTscDeadline() { return (s_processorFeaturesC & (1 << 24)) != 0; }
120  static inline bool hasAes () { return (s_processorFeaturesC & (1 << 25)) != 0; }
121  //static inline bool hasXsave() { return (s_processorFeaturesC & (1 << 26)) != 0; }
123  static inline bool hasOsxsave() { return (s_processorFeaturesC & (1 << 27)) != 0; }
125  static inline bool hasAvx () { return (s_processorFeaturesC & (1 << 28)) != 0; }
127  static inline bool hasBmi1 () { return (s_processorFeatures7B& (1 << 3)) != 0; }
129  static inline bool hasHle () { return (s_processorFeatures7B& (1 << 4)) != 0; }
131  static inline bool hasAvx2 () { return (s_processorFeatures7B& (1 << 5)) != 0; }
133  static inline bool hasBmi2 () { return (s_processorFeatures7B& (1 << 8)) != 0; }
135  static inline bool hasRtm () { return (s_processorFeatures7B& (1 << 11)) != 0; }
136 
138  static inline bool hasAvx512f () { return (s_processorFeatures7B & (1u << 16)) != 0; }
140  static inline bool hasAvx512dq () { return (s_processorFeatures7B & (1u << 17)) != 0; }
142  static inline bool hasAvx512ifma() { return (s_processorFeatures7B & (1u << 21)) != 0; }
144  static inline bool hasAvx512pf () { return (s_processorFeatures7B & (1u << 26)) != 0; }
146  static inline bool hasAvx512er () { return (s_processorFeatures7B & (1u << 27)) != 0; }
148  static inline bool hasAvx512cd () { return (s_processorFeatures7B & (1u << 28)) != 0; }
150  static inline bool hasAvx512bw () { return (s_processorFeatures7B & (1u << 30)) != 0; }
152  static inline bool hasAvx512vl () { return (s_processorFeatures7B & (1u << 31)) != 0; }
154  static inline bool hasAvx512vbmi() { return (s_processorFeatures7C & (1u << 1)) != 0; }
155 
157  static inline bool hasF16c () { return (s_processorFeaturesC & (1 << 29)) != 0; }
159  static inline bool hasRdrand(){ return (s_processorFeaturesC & (1 << 30)) != 0; }
161  static inline bool hasFpu () { return (s_processorFeaturesD & (1 << 0)) != 0; }
162  static inline bool hasVme () { return (s_processorFeaturesD & (1 << 1)) != 0; }
164  static inline bool hasDe () { return (s_processorFeaturesD & (1 << 2)) != 0; }
166  static inline bool hasPse () { return (s_processorFeaturesD & (1 << 3)) != 0; }
168  static inline bool hasTsc () { return (s_processorFeaturesD & (1 << 4)) != 0; }
170  static inline bool hasMsr () { return (s_processorFeaturesD & (1 << 5)) != 0; }
172  static inline bool hasPae () { return (s_processorFeaturesD & (1 << 6)) != 0; }
174  static inline bool hasCx8 () { return (s_processorFeaturesD & (1 << 8)) != 0; }
176  static inline bool hasMtrr () { return (s_processorFeaturesD & (1 << 12)) != 0; }
178  static inline bool hasCmov () { return (s_processorFeaturesD & (1 << 15)) != 0; }
180  static inline bool hasClfsh() { return (s_processorFeaturesD & (1 << 19)) != 0; }
182  static inline bool hasAcpi () { return (s_processorFeaturesD & (1 << 22)) != 0; }
184  static inline bool hasMmx () { return (s_processorFeaturesD & (1 << 23)) != 0; }
186  static inline bool hasSse () { return (s_processorFeaturesD & (1 << 25)) != 0; }
188  static inline bool hasSse2 () { return (s_processorFeaturesD & (1 << 26)) != 0; }
189  static inline bool hasHtt () { return (s_processorFeaturesD & (1 << 28)) != 0; }
191  static inline bool hasSse4a() { return (s_processorFeatures8C & (1 << 6)) != 0; }
193  static inline bool hasMisAlignSse() { return (s_processorFeatures8C & (1 << 7)) != 0; }
195  static inline bool hasAmdPrefetch() { return (s_processorFeatures8C & (1 << 8)) != 0; }
197  static inline bool hasXop () { return (s_processorFeatures8C & (1 << 11)) != 0; }
199  static inline bool hasFma4 () { return (s_processorFeatures8C & (1 << 16)) != 0; }
201  static inline bool hasRdtscp() { return (s_processorFeatures8D & (1 << 27)) != 0; }
202  static inline bool has3DNow() { return (s_processorFeatures8D & (1u << 31)) != 0; }
203  static inline bool has3DNowExt() { return (s_processorFeatures8D & (1 << 30)) != 0; }
205  static inline uint L1Instruction() { return s_L1Instruction; }
207  static inline uint L1Data() { return s_L1Data; }
209  static inline uint L2Data() { return s_L2Data; }
211  static inline uint L3Data() { return s_L3Data; }
212  static inline ushort L1InstructionLineSize() { return s_L1InstructionLineSize; }
213  static inline ushort L1DataLineSize() { return s_L1DataLineSize; }
214  static inline ushort L2DataLineSize() { return s_L2DataLineSize; }
215  static inline ushort L3DataLineSize() { return s_L3DataLineSize; }
216  static inline uint L1Associativity() { return s_L1Associativity; }
217  static inline uint L2Associativity() { return s_L2Associativity; }
218  static inline uint L3Associativity() { return s_L3Associativity; }
219  static inline ushort prefetch() { return s_prefetch; }
220 
221  private:
222  static void interpret(uchar byte, bool *checkLeaf4);
223 
224  static uint s_ecx0;
225  static uint s_logicalProcessors;
226  static uint s_processorFeaturesC;
227  static uint s_processorFeaturesD;
228  static uint s_processorFeatures7B;
229  static uint s_processorFeatures7C;
230  static uint s_processorFeatures8C;
231  static uint s_processorFeatures8D;
232  static uint s_L1Instruction;
233  static uint s_L1Data;
234  static uint s_L2Data;
235  static uint s_L3Data;
236  static ushort s_L1InstructionLineSize;
237  static ushort s_L1DataLineSize;
238  static ushort s_L2DataLineSize;
239  static ushort s_L3DataLineSize;
240  static uint s_L1Associativity;
241  static uint s_L2Associativity;
242  static uint s_L3Associativity;
243  static ushort s_prefetch;
244  static uchar s_brandIndex;
245  static uchar s_cacheLineSize;
246  static uchar s_processorModel;
247  static uchar s_processorFamily;
248  static ProcessorType s_processorType;
249  static bool s_noL2orL3;
250 };
251 
252 #ifndef Vc_COMPILE_LIB
253 namespace detail
254 {
255 template <int = 0> struct RunCpuIdInit {
256  RunCpuIdInit() { CpuId::init(); }
257  static RunCpuIdInit tmp;
258 };
259 template <int N> RunCpuIdInit<N> RunCpuIdInit<N>::tmp;
260 namespace
261 {
262 static auto ctor = RunCpuIdInit<>::tmp;
263 } // unnamed namespace
264 } // namespace detail
265 #endif
266 
267 }
268 
269 #endif // VC_CPUID_H_
Vc::CpuId::hasRtm
static bool hasRtm()
Return whether the CPU supports transactional synchronization extensions.
Definition: cpuid.h:135
Vc::CpuId::processorModel
static uint processorModel()
Return the model number of the processor (vendor dependent).
Definition: cpuid.h:79
Vc::uchar
unsigned char uchar
unsigned char shorthand
Definition: types.h:60
Vc::CpuId::hasSmx
static bool hasSmx()
Return whether the CPU supports the Safer Mode Extensions.
Definition: cpuid.h:95
Vc::uint
unsigned int uint
unsigned int shorthand
Definition: types.h:56
Vc::CpuId::isIntel
static bool isIntel()
Return whether the CPU vendor is Intel.
Definition: cpuid.h:85
Vc::CpuId::hasAvx512vl
static bool hasAvx512vl()
Return whether the CPU supports AVX512vl.
Definition: cpuid.h:152
Vc::CpuId::hasSse4a
static bool hasSse4a()
Return whether the CPU supports SSE4a.
Definition: cpuid.h:191
Vc::CpuId::hasF16c
static bool hasF16c()
Return whether the CPU supports 16-bit floating-point conversion instructions.
Definition: cpuid.h:157
Vc::CpuId::hasPae
static bool hasPae()
Return whether the CPU supports the Physical Address Extension.
Definition: cpuid.h:172
Vc::CpuId::hasAvx512dq
static bool hasAvx512dq()
Return whether the CPU supports AVX512dq.
Definition: cpuid.h:140
Vc::CpuId::hasVmx
static bool hasVmx()
Return whether the CPU supports the Virtual Machine Extensions.
Definition: cpuid.h:93
Vc::CpuId::L2Data
static uint L2Data()
Return the size of the L2 cache.
Definition: cpuid.h:209
Vc::CpuId::hasMtrr
static bool hasMtrr()
Return whether the CPU supports Memory Type Range Registers.
Definition: cpuid.h:176
Vc::CpuId::hasAvx512cd
static bool hasAvx512cd()
Return whether the CPU supports AVX512cd.
Definition: cpuid.h:148
Vc::CpuId::hasAvx512f
static bool hasAvx512f()
Return whether the CPU supports AVX512f.
Definition: cpuid.h:138
Vc::CpuId::hasOsxsave
static bool hasOsxsave()
Return whether the CPU and OS support the XSETBV/XGETBV instructions.
Definition: cpuid.h:123
Vc::CpuId::hasPclmulqdq
static bool hasPclmulqdq()
Return whether the CPU supports the PCLMULQDQ instruction.
Definition: cpuid.h:89
Vc::CpuId::hasMonitor
static bool hasMonitor()
Return whether the CPU supports the MONITOR/MWAIT instructions.
Definition: cpuid.h:91
Vc::CpuId::isAmd
static bool isAmd()
Return whether the CPU vendor is AMD.
Definition: cpuid.h:83
Vc::CpuId::hasMisAlignSse
static bool hasMisAlignSse()
Return whether the CPU supports misaligned SSE instructions.
Definition: cpuid.h:193
Vc::CpuId::hasBmi1
static bool hasBmi1()
Return whether the CPU supports BMI1.
Definition: cpuid.h:127
Vc::CpuId::hasSse3
static bool hasSse3()
Return whether the CPU supports SSE3.
Definition: cpuid.h:87
Vc::CpuId::hasPdcm
static bool hasPdcm()
Return whether the CPU supports the Perfmon and Debug Capability.
Definition: cpuid.h:107
Vc::CpuId::logicalProcessors
static uint logicalProcessors()
Return the number of logical processors.
Definition: cpuid.h:81
Vc::CpuId::hasSse
static bool hasSse()
Return whether the CPU supports SSE.
Definition: cpuid.h:186
Vc::CpuId::hasAcpi
static bool hasAcpi()
Return whether the CPU supports ACPI.
Definition: cpuid.h:182
Vc::CpuId::hasPse
static bool hasPse()
Return whether the CPU contains Page Size Extensions.
Definition: cpuid.h:166
Vc::CpuId::hasAvx
static bool hasAvx()
Return whether the CPU supports AVX.
Definition: cpuid.h:125
Vc::CpuId::hasSse42
static bool hasSse42()
Return whether the CPU supports SSE 4.2.
Definition: cpuid.h:113
Vc::CpuId::hasAmdPrefetch
static bool hasAmdPrefetch()
Return whether the CPU supports the AMD prefetchw instruction.
Definition: cpuid.h:195
Vc::CpuId::L3Data
static uint L3Data()
Return the size of the L3 cache.
Definition: cpuid.h:211
Vc::CpuId::hasAvx512ifma
static bool hasAvx512ifma()
Return whether the CPU supports AVX512ifma.
Definition: cpuid.h:142
Vc::CpuId::hasRdrand
static bool hasRdrand()
Return whether the CPU supports the RDRAND instruction.
Definition: cpuid.h:159
Vc::CpuId::hasCmov
static bool hasCmov()
Return whether the CPU supports CMOV instructions.
Definition: cpuid.h:178
Vc::CpuId::hasClfsh
static bool hasClfsh()
Return whether the CPU supports the CLFLUSH instruction.
Definition: cpuid.h:180
Vc::CpuId::hasAes
static bool hasAes()
Return whether the CPU supports the AESNI instructions.
Definition: cpuid.h:120
Vc::CpuId::hasRdtscp
static bool hasRdtscp()
Return whether the CPU supports the RDTSCP instruction.
Definition: cpuid.h:201
Vc::CpuId::hasCmpXchg16b
static bool hasCmpXchg16b()
Return whether the CPU supports CMPXCHG16B.
Definition: cpuid.h:105
Vc::CpuId::hasFpu
static bool hasFpu()
Return whether the CPU contains an x87 FPU.
Definition: cpuid.h:161
Vc::CpuId
This class is available for x86 / AMD64 systems to read and interpret information about the CPU&#39;s cap...
Definition: cpuid.h:50
Vc::CpuId::hasMmx
static bool hasMmx()
Return whether the CPU supports MMX.
Definition: cpuid.h:184
Vc::CpuId::hasSse2
static bool hasSse2()
Return whether the CPU supports SSE2.
Definition: cpuid.h:188
Vc::CpuId::hasAvx512er
static bool hasAvx512er()
Return whether the CPU supports AVX512er.
Definition: cpuid.h:146
Vc::CpuId::hasCx8
static bool hasCx8()
Return whether the CPU supports the CMPXCHG8B instruction.
Definition: cpuid.h:174
Vc::CpuId::L1Instruction
static uint L1Instruction()
Return the size of the L1 instruction cache.
Definition: cpuid.h:205
Vc::CpuId::hasDca
static bool hasDca()
Return whether the CPU supports Direct Cache Access: prefetch data from a memory mapped device...
Definition: cpuid.h:109
Vc::CpuId::hasBmi2
static bool hasBmi2()
Return whether the CPU supports BMI2.
Definition: cpuid.h:133
Vc::CpuId::hasFma
static bool hasFma()
Return whether the CPU supports FMA extensions using YMM state.
Definition: cpuid.h:103
Vc::CpuId::hasTm2
static bool hasTm2()
Return whether the CPU supports Thermal Monitor 2.
Definition: cpuid.h:99
Vc::CpuId::processorType
static ProcessorType processorType()
Return the ProcessorType.
Definition: cpuid.h:75
Vc::CpuId::hasAvx512pf
static bool hasAvx512pf()
Return whether the CPU supports AVX512pf.
Definition: cpuid.h:144
Vc::CpuId::hasXop
static bool hasXop()
Return whether the CPU supports the XOP instructions.
Definition: cpuid.h:197
Vc::CpuId::hasDe
static bool hasDe()
Return whether the CPU contains Debugging Extensions.
Definition: cpuid.h:164
Vc::ushort
unsigned short ushort
unsigned short shorthand
Definition: types.h:58
Vc::CpuId::hasFma4
static bool hasFma4()
Return whether the CPU supports the FMA4 instructions.
Definition: cpuid.h:199
Vc::CpuId::processorFamily
static uint processorFamily()
Return the family number of the processor (vendor dependent).
Definition: cpuid.h:77
Vc::CpuId::hasTsc
static bool hasTsc()
Return whether the CPU supports the RDTSC instruction.
Definition: cpuid.h:168
Vc::CpuId::hasSsse3
static bool hasSsse3()
Return whether the CPU supports SSSE3.
Definition: cpuid.h:101
Vc::CpuId::L1Data
static uint L1Data()
Return the size of the L1 data cache.
Definition: cpuid.h:207
Vc::CpuId::hasAvx512vbmi
static bool hasAvx512vbmi()
Return whether the CPU supports AVX512vbmi.
Definition: cpuid.h:154
Vc::CpuId::hasPopcnt
static bool hasPopcnt()
Return whether the CPU supports the POPCNT instruction.
Definition: cpuid.h:117
Vc::CpuId::hasEist
static bool hasEist()
Return whether the CPU supports the Enhanced Intel SpeedStep technology.
Definition: cpuid.h:97
Vc::CpuId::cacheLineSize
static ushort cacheLineSize()
Return the cache line size in bits.
Definition: cpuid.h:73
Vc::CpuId::hasSse41
static bool hasSse41()
Return whether the CPU supports SSE 4.1.
Definition: cpuid.h:111
Vc::CpuId::hasMsr
static bool hasMsr()
Return whether the CPU supports the Model Specific Registers instructions.
Definition: cpuid.h:170
Vc::CpuId::hasAvx2
static bool hasAvx2()
Return whether the CPU supports AVX2.
Definition: cpuid.h:131
Vc::CpuId::hasHle
static bool hasHle()
Return whether the CPU supports transactional synchronization extensions.
Definition: cpuid.h:129
Vc::CpuId::hasMovbe
static bool hasMovbe()
Return whether the CPU supports the MOVBE instruction.
Definition: cpuid.h:115
Vc::CpuId::hasAvx512bw
static bool hasAvx512bw()
Return whether the CPU supports AVX512bw.
Definition: cpuid.h:150